Recently, the integration density of semiconductor devices has continued to increase. As one of methods for increasing the integration density of a semiconductor device, a three-dimensional (3D) structure has been proposed, the 3D structure including components such as electrodes arranged in a 3D manner. A semiconductor device having a 3D structure is disclosed in Japanese Patent Publication No. 2015-50466, for example.
During a process of forming a flash memory having a 3D structure, a stacked film may be formed by alternately stacking insulating films and sacrificial films. However, due to a factor such as a difference in coefficient of thermal expansion between the insulating film and the sacrificial film, stress is applied to a silicon wafer. Thus, while the stacked film is formed, the stacked film may be destroyed. Such a phenomenon may degrade the characteristic of the semiconductor device.